Inside TEF 2025: How Ethernet Is Responding to AI’s Rapid Scale, Part 1
At the Ethernet Alliance’s Technology Exploration Forum (TEF 2025): Ethernet for AI, held in December 2025, industry voices came together to examine how Ethernet is shaping the future of AI infrastructure – a matter of urgency, given that AI workloads are scaling faster than networks can comfortably support them. Conversations surfaced both emerging challenges and new opportunities, from growing performance demands to the increasing need for deeper collaboration across the ecosystem.
We’ve tapped into the expertise of TEF 2025 speakers to answer a critical question: how should Ethernet evolve as AI accelerates at an unprecedented pace? Their perspectives unpack the innovations, collaboration, and hard decisions that must be made in an increasingly AI-driven world.
A Glimpse into Ethernet’s Future
The Ethernet Alliance’s TEF 2025: Ethernet for AI built on last year’s momentum but then leapt ahead, surprising me at every turn. The event felt like a fast-forward glimpse into Ethernet’s future, where the industry is racing to cement Ethernet as the interconnect of choice for AI networks. Speakers delved deeply into modulation strategies, the evolving role of FEC, channel and packaging breakthroughs, and the nitty-gritty of testing and measurement, with each session peeling back another layer of the technical puzzle surrounding 400Gb/s electrical and optical signaling. When engineers and vendors converge on solutions, development accelerates and TEF 2025 provided that rare, high-energy forum where true consensus can form. That shared progress will be essential as the community prepares for the IEEE 802.3 study group expected to emerge from the March 2026 plenary. – John D’Ambrosia, Ethernet Alliance Chief Ethernet Evangelist
What stood out most at TEF 2025 was the depth of collaboration between hyperscalers, vendors, and standards bodies such as IEEE, OIF, Ethernet Alliance, OCP, and UEC, aligning on 400–448G signaling, modulation, and FEC. This alignment will enable Ethernet to keep pace with AI’s demands, all while confronting the very real power, cooling, and space constraints in modern data centers. The event also offered a great opportunity to connect with peers, where hallway conversations very quickly turned into deep dives on scale-out fabrics, deployment trade-offs, next-gen interconnect technologies, and lessons learned from building AI-ready infrastructure at hyperscale. – Arihant Jain, Manager, Systems Engineering, Arista Networks
Artificial Intelligence (AI) is transforming networking, creating requirements that differ significantly from traditional front-end Ethernet. Recent advancements in channel design show that 100GHz bandwidth can enable new opportunities but introduce challenges in connector scalability, modulation choices, and standards alignment. Accelerated time-to-market pressures require silicon teams to deliver 400Gbps/lane solutions before 200Gbps/lane feedback cycles, while Forward Error Correction (FEC) strategies and error handling remain complex. Industry stakeholders are also requesting advanced tuning features in Ethernet standards to optimize latency and performance. – Kent Lusted, Distinguished Architect, Synopsys
My key takeaway from TEF 2025 is twofold. First, there is broad alignment that 400Gbps per lane is the next critical development target. Across the sessions, speakers largely accepted both the necessity and the difficulty of delivering this step in bandwidth. Second, while there is emerging consensus around PAM4 for photonics at 400Gbps per lane, there is no clear agreement yet on modulation or FEC for copper. Instead, the ecosystem is actively exploring how far copper can be extended, potentially with different modulations, which may result in divergent specifications optimized for different media. Overall, we were mostly in agreement and rolling up our sleeves. Very rare! – Bijan Nowroozi, Head of Ecosystem Development, Lightmatter
The Ethernet Alliance TEF 2025 conference highlighted the need for 400G per lane, along with the advances and challenges in achieving it using both optical and copper interconnect technologies. It also underscored the importance of higher-radix switches to enable efficient scaling of AI clusters. Different organizations related to Ethernet and optical devices – such as IEEE 802.3, the UEC, and the OIF – are working and aligning their efforts to support future AI server systems. Overall, there was strong participation and collaboration across the ecosystem to enable Ethernet fabrics that can efficiently support larger numbers of GPUs. – Jose Castro, Distinguished Engineer & Optical Communication Research Manager, Panduit
My key takeaway from TEF 2025 is the crucial role of the CEI-448G framework in addressing the top challenges facing high-speed connectivity today: power, cost, and electrical channel reach. To meet the rapidly accelerating demands of AI and machine learning, the industry and SDOs must adopt a phased strategy. Near-term, we must maximize existing infrastructure by utilizing higher-order modulation like PAM6. Mid-term, we can begin deploying PAM4 in interfaces where it is viable, such as CPO. Long term, once the hardware transition is complete, the industry can fully switch to PAM4 while reserving PAM6 or PAM8 for longer reach and extremely high-speed requirements, such as 996G. – Cathy Liu, SerDes Architect and Distinguished Engineer, Broadcom
Participation in the Ethernet Alliance TEF 2025 conference was highly valuable. The 400G workshop enabled TE Connectivity to contribute to the “Copper Interconnect for 400Gb/s Signaling for AI Networks” panel, where we shared progress on 400G development, prototyping, and testing for market evaluation. The event provided strong technical insights and meaningful engagement with industry leaders through both panel discussions and one-to-one interactions. These takeaways align well with TE’s ongoing ecosystem interconnect and channel concepting efforts and will help inform architectural decisions as we continue advancing scalable 400G solutions for next-generation AI/ML fabrics. – Ashika Shaji, Senior System Architect, TE Connectivity
The current AI growth cycle is accelerating at an unprecedented pace, driving large-scale infrastructure investments and rapid deployment of accelerators. This surge is fundamentally reshaping networking, with connectivity attached to XPU-based systems growing significantly faster than traditional infrastructure, driven by increasing front-end and back-end network requirements and higher port speeds, alongside incremental spending on switches, optics, and cabling. Looking ahead, 2026 is expected to mark broader adoption of next-generation back-end networks and continued progress toward higher-speed switching and new server architectures based on 200G SerDes. The subsequent transition to interconnects with 400G SerDes over the next few years will depend on overcoming meaningful electrical and thermal challenges, a theme TEF will continue to focus on. – Baron Fung, Senior Research Director, Dell’Oro Group
The Voice of Ethernet: Convening the Industry at a Watershed Moment
TEF 2025 reinforced the Ethernet Alliance’s fundamental role as the Voice of Ethernet, uniting key industry stakeholders to tackle Ethernet’s most pressing challenges and opportunities. By bringing the ecosystem together at this pivotal juncture, TEF 2025 helped foster the alignment, dialogue, and collaboration needed to move Ethernet forward in the AI era. Want to go deeper? Explore our on-demand TEF 2025 Video Showcase to hear directly from our speakers.
