The Ethernet Alliance will be hosting their next Technology Exploration Forum “Ethernet for AI” in Mountain View, CA on December 2-3, 2025. The agenda for this event is outlined below. To register, click here.
To view the Day 1 agenda, click here.
Wednesday, December 3, 2025 |
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| Time | Title |
| 9:00 AM | Opening Comments – John D’Ambrosia, Ethernet Alliance TEF Event Chair |
| 9:05 AM |
“400 Gb/s Optics for AI Networks”Join us as industry experts share their viewpoints on the role of optical solutions for future AI systems, based on 400 Gb/s signaling Moderator: Vlad Kozlov, LightCounting Participants:
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| 10:35 AM | Break |
| 10:45 AM |
“Copper Interconnect for 400 Gb/s Signaling for AI Networks”This panel of industry experts will explore copper interconnect for 400 Gb/s signaling to support future AI systems. Moderator: Lisa Huff, DC Tech Analysis Participants:
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| 12:00 PM | Lunch |
| 1:00 PM |
SNIA Storage for AI EffortsTom Palkert, Samtec, Chair of the SNIA/SFF Transceivers Subgroup |
| 1:20 PM |
“400 Gb/s Electrical Signaling for AI Networks”Join us as the OIF gives an update on its 448 Framework Moderator: Lisa Huff, DC Tech Analysis Participants:
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| 2:50 PM | Break |
| 3:15 PM |
“”Ethernet for AI Isn’t Just Evolving — It’s Exploding: Kicking off 400G/lane and 3.2TbE in 2026!””AI is the next driver of Ethernet. Join leaders of the IEEE 802.3 Ethernet Community in exploring the start of Ethernet’s development to address AI’s need for 400 Gb/s per lane and 3.2 Tb/s Ethernet. Moderator: David Law, HPE, Chair, IEEE 802.3 Ethernet Working Group Participants:
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| 4:30PM | Closing Comments, John D’Ambrosia – TEF Chair |
| 4:45 PM | End of Day |