Cathy Liu, OIF Board Member (Broadcom)

Bio: Cathy Liu, distinguished Engineer, currently heads up Broadcom SerDes architecture and modeling group. Since 2002, she has been working on high speed transceiver solutions. Previously she has developed read channel and mobile digital TV receiver solutions. Her technical interests are signal processing, FEC, and modeling in high-speed optical and electrical transceiver solutions. She has published many journal and conference papers and holds 20+ US patents. Cathy has demonstrated her leadership roles in industry standard bodies and forums. Cathy currently serves as the vice president of the board director of Optical Internetworking Forum (OIF), a member of the board of advisors for the department of Electrical & Computer Engineering (ECE) of University of California at Davis, a member of Signal Integrity Journal editorial advisory board, and the co-chair of the DesignCon technical track of high speed signal processing, equalization and coding. She received DesignCon 2021 engineer of the year award. She received her B.S. degree in Electronic Engineering from Tsinghua University, China and received her M.S. and Ph.D. degrees in Electrical Engineering from University of Hawaii.

Presentation Abstract: In the era of AI, the demand for higher data transfer rates is continuously increasing, particularly in high-performance computing and data center environments.  This presentation, as part of the “Exploration of AI interconnect” session, delves into the performance analysis of 400+ Gbps transmission over next-generation chip-to-module channels. Collaborating with experts from interconnect component vendors and semiconductor vendors, we explore the challenges and solutions in optimizing next generation channels and SerDes performance. The analysis focuses on channel loss, signal integrity, bandwidth, SerDes options and trade-offs, providing insights into the CEI-448G technologies, especially for the feasibility of chip-to-module VSR interface.