Tony Chan Carusone – Alphawave Semi
Bio: Dr. Tony Chan Carusone has researched integrated circuits and systems for high-speed connectivity in industry and academia for over 20 years. He has been the Chief Technology Officer of Alphawave Semi since 2022 and a faculty member at the University of Toronto since completing his Ph.D. there in 2002. Dr. Carusone has authored over 100 publications, including 11 best paper awards at leading conferences for his work on chip-to-chip and optical communication, analog-to-digital conversion, and precision clock generation. Tony is an IEEE Fellow, and has consulted for the semiconductor industry, collaborating with startups and major global tech companies for more than two decades.
Presentation Abstract:
Exploring 400Gbps-Class Signaling Over Electrical Interfaces
Traditionally, back-end AI networks have relied on electrical interconnects, and there remains a strong desire to maximize their use to keep costs and power consumption low. But the push to scale AI systems is running into the bandwidth limitations of electrical interconnect and analog front-end circuits. Even when optical physical layers are introduced, electrical interfaces are still required between large advanced-logic dies (AI accelerators or switches) and the optoelectronic transceivers. This presentation will share analyses that highlight the challenges of 400Gbps-class signaling over electrical interfaces. Specifically, the frequency-response improvements required to sustain new signaling rates will be quantified. The interplay between PAM modulation formats, coding, channel response, and analog front-end performance will be explored. The potential for advanced packaging and chiplets to address these challenges will depend on the capabilities of supporting die-to-die interfaces.
Advancing AI Scalability with New Optical Connectivity Technologies
As the IEEE 802.3dj project concludes, the industry will pivot to new technologies in support of AI scaling. Networking thousands of accelerators will drive new applications for optical physical layers, and any associated new connectivity standards must prioritize low-cost optical technologies to make AI growth sustainable. This presentation will first look at the impact of optical impairments on the reach of 400+Gbps IMDD links. Those impairments, additional losses associated with all-optical switches, and the bandwidth limitations of cost-effective optical modulators and analog-front end circuits all present headwinds for 400Gbps-class IMDD signaling. Thus, coherent-lite technologies may be preferable to IMDD in certain applications. For example, coherent links at 800Gbps/λ have bandwidth requirements similar to 200Gbps IMDD, and link budgets with more margin. Whereas 400Gbps-class IMDD transceivers can be expected to require more complex signal processing, coding, and component technologies than 200Gbps 4-PAM signaling, significant reductions in the cost and power of coherent transceivers are possible by tailoring them to AI networking.
